1. Field
The present application is directed to circuits and methods for capacitor charging as may be used in connection with oscillator circuits.
2. Related Art
Oscillators are used in devices such as cellular telephones, smartphones, personal digital assistants, clocks and computers to provide reference oscillating signals. One metric for measuring the quality of an oscillator is the time it takes the oscillator to startup, referring to the time it takes the oscillator to settle to a target frequency. Certain products which use oscillators specify acceptable startup times.
In practice, oscillators and other circuits are often realized as integrated circuits. Often it is desirable to maintain strict signal isolation to prevent creating undesirable spurious tones, and thus isolated circuit blocks are used. Signal isolation is aided by allowing separate ground and power supply pins for each isolated circuit block. In addition, external components (i.e., not integrated) are frequently needed.
FIG. 1A illustrates a conventional NMOS current mirror with high current amplifier. The circuit 100 includes a reference current source 101 providing a reference current Iref connected to a current mirror formed by NMOS transistors M1 and M2, with a resistor R1 connecting the gates of M1 and M2. The current mirror is also connected to analog circuit 102 via the NMOS transistor M2. The current amplifier A1 charges a capacitor C1 via switch S1. The crossed boxes in FIG. 1A represent pins to external components, and thus C1 is an external capacitor (i.e., not integrated with the other circuit components). Rgnd1, Rgnd2 and Rgnd3 are resistances that signify that each ground connection has some impedance. Because C1 is external, the node between C1 and Rgnd2 is not accessible to the designer of the integrated circuit.
In operation, the reference current Iref is applied to the NMOS current mirror and filtered to create a bias current (via M2) for the analog circuit 102. During startup, S1 is closed and S2 is open. After C1 is charged such that Vg(M1)=Vg(M2)=VC1, S1 is opened, S2 is closed, and the current amplifier A1 is powered down. The current Iamp of the current amplifier A1 flows to ground through Rgnd1. Similarly, the current Is(M1) through NMOS transistor M1 flows to ground through Rgnd1.
FIG. 1B illustrates the behavior of the voltage Vg(M1) on the gate of transistor M1 and the voltage VC1 on the capacitor C1 as a function of time for the circuit 100 of FIG. 1A. The y-axis represents voltage and the x-axis represents time. The origin corresponds to t=0, prior to circuit operation. The illustrated graph illustrates the scenario in which the current amplifier A1 is turned on at t=0 and turned off at the point in time labeled as toff.
FIG. 2A illustrates an alternative conventional configuration to that of FIG. 1A. Here, the circuit 200 includes conduction between the grounds represented by the parasitic resistance Rpar. FIG. 2B illustrates the behavior of the voltage Vg(M1) on the gate of transistor M1 and the voltage VC1 on the capacitor C1 as a function of time for the circuit 200 of FIG. 2A.